Design of MAC unit (dsp processors) using VHDL -
my project design of 32bit mac(multiply , accumlate) unit using reversible logic. project , have designed 32bit mulitplier , 64 bit adder using reversible logic. now, in next step want design 64 bit accumlator takes value adder , stores , adds previous value present in it. not getting idea how design accumlator. please in completion of project.
a basic vhdl accumulator can implemented in few lines of code. how you decide implement it, , additional features necessary going depend on specific requirements.
for example:
- are inputs signed or unsigned?
- what type of inputs?
- does accumulator saturate, or roll over?
here sample unsigned accumulator give idea of need implement (based on source):
library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity accumulator port ( din: in std_logic_vector(3 downto 0); clk: in std_logic; rst: in std_logic; dout: out std_logic_vector(3 downto 0) ); end entity accumulator; architecture behave of accumulator signal acc_value : std_logic_vector(3 downto 0); begin process(clk) begin if rising_edge(clk) if rst='1' acc_value <= (others => '0'); -- reset accumulated value 0 else acc_value <= std_logic_vector( unsigned(acc_value) + unsigned(din) ); end if; end if; end process; -- assign output dout <= acc_value; end behave;
to describe design in words: every clock cycle on rising edge, data input din
interpreted unsigned value, , added accumulated value acc_value
. if rst
input asserted, instead of accumulating din
input, accumulated value cleared 0. value of accumulator presented on output of block, dout
.
based on interfacing with, might want consider following changes/modifications:
- perhaps
din
shouldsigned
orunsigned
types instead ofstd_logic_vector
. recommend this, depends on how representing values in other places of design. dout
signed
orunsigned
value instead ofstd_logic_vector
- depends requirements.- in case,
acc_value
, accumulated value register, rollover if values accumulated high. maybe want generate error condition when happens, or perform check ensure saturate @ maximum value ofacc_value
instead. acc_value
need not same widthdin
-- twice wide (or whatever requirements are). wider is, more can accumulate before rollover condition occurs.
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